|
|
SHORT COURSE
Short Course entitled "Si technology challenges in More Moore and More than Moore era" is planned to be held on September 21 (Tue). All lectures will be given in English.
Title:
Si technology challenges in More Moore and More than Moore era.
Data:
September 21, 2010.
Place:
Hongo Campus, The University of Tokyo (Faculty of Engineering Bldg.2 / 4F Room 241)
Organizers:
Keishi Ohashi (NEC) and Digh Hisamoto (Hitachi, Ltd.)
Scope:
ULSI technology has been flourished for over 40 years in line with Moore’s Law, today, however, advanced technologies which can take us beyond the Law (more Moore) or superior technologies (more than Moore) are urgently being pursued. In this short course, the outlook for Si technology challenges today and in the future with regard to the above situation will be presented by spirited tutors from academia and industry.
To raise interest and inspire students and young researchers, the issues will be explained from basic theoretical and practical points of view.
1. 11:00-12:00
Overview of Si challenges
Prof. A. Toriumi (The University of Tokyo)
In recent advancements of Si-ULSIs, new materials and new device functions have been considered and demonstrated for overcoming a number of intrinsic challenges in Si CMOS. In this overview, we will start with Si CMOS basics, and then discuss hot topics currently argued for pushing Si technology further ahead. Si technology seems to be very conservative in today’s business, but quite radical for tomorrow’s innovation. So, it’s still great fun finding something new both on the roadmap and off the roadmap.
---- 12:00-13:00 Lunch
2. 13:00-13:50
Advanced CMOS Technology - Continuing challenges to keep Moore's Law
Dr. K. Ishimaru (Toshiba America Electronic Components Inc.)
Now 45/40nm node products are ramping up its volume and 32/28nm node products will be shipped second half of this year. This lecture reviews challenges and issues to implement new processes/technology and gives the challenges towards 22/20nm node.
3. 13:50-14:40
Carrier Transport in Advanced CMOS Transistors
Prof. N. Mori (Osaka University)
Continued device performance improvements will be accomplished through a combination of device scaling with new materials and new device structures. This short course describes a way of understanding current flow in advanced CMOS transistors. Topics include ballistic transport, quantum confinements, band-structure effects, strain engineering, fluctuations, and energy dissipation.
4. 14:40-15:30
Electric property fluctuation in deca-nanometer scale MOSFET caused by single electron capture and emission
Dr. R. Yamada (Hitachi, Ltd.)
MOS field-effect-transistor (MOSFET) is by its nature critically sensitive to an electric field disturbance. The electric field at an oxide-semiconductor interface that turns on the channel of a MOSFET is in the order of 1 MV/cm. The distance of this electric field created by a single electron is about 3 nm and 6 nm in Si and SiO2, respectively. Single electron capture in and emission out of a trap in MOSFET thus induces nonnegligible variability in device parameters such as threshold voltage, ON current, and OFF leak in deca-nanometer scale MOSFET. This kind of variability in commercial LSIs was first reported in 90 nm flash memory as a random telegraph noise (RTN) of channel current, which causes threshold voltage variability. The RTN of drain current is also reported in state-of-the-art SRAM. The RTN caused by single electron behavior is also observed in other types of current such as p-n junction leakage current and gate oxide leakage current. Possible RTN caused by single electron behavior in LSI and its influence on deca-namometer scale MOSFET are discussed in this course.
----15:30-15:50 Break
5. 15:50-16:40
Si Photonics
Prof. K. Wada (The University of Tokyo)
This short course introduces the fundamentals and impacts of Si photonics. It also describes global perspectives on Si photonics as a key technology for electronic-photonic convergence to keep the pace of information technology innovation with a global review of most important activities and key results.
6. 16:40-17:30
Surface MEMS
Prof. H. Toshiyoshi (The University of Tokyo)
MEMS (microelectromechanical system) is an enabling technology to deliver more-than-Moore like values to the future electronics, for micromechanisms on silicon have those functions that could not be obtained by the solid-state electronic of silicon, such as motion sensing, acoustic vibration sensing, and mechanical stress/strain generation. This lecture covers the fundamental theory of microactuation and CMOS-compatible processes for the integration of surface MEMS.
|