SSDM 2007


Among all the high quality papers to be presented at SSDM2007,
the Program Committee particularly selected the twelve papers
listed below as The Highly Notable Papers of SSDM2007 and
released the list to the media on 29th August 2007.

nMOSFET Reliability Improvement attributed to the Interfacial Dipole formed by La Incorporation in HfO2
C. Y. Kang1, P.Kirsch2 , D.Heh1, C.Yong1, P.Sivasubramani1, G.Bersuker1, S.C.Song1, R.Choi1, B.H.Lee2, J.Lichtenwalner3, J.S.Jur3, A.I.Kingon3 and R.Jammy2,
1SEMATECH,2IBM Assignee, and 3North Carolina State Univ.(USA)
Session No.A-3-4 September 20, Room101, 10:00 start !
“A Small Area, 3-Dimentional On-Chip Inductors for High-Speed Signal Processing under Low Power Supply Voltage”
K. Hijioka, A. Tanabe, Y. Amamiya, and Y. Hayashi,
NEC Corp.(Japan)
Session No.C-7-3 September 21, Room201A, 9:40 start !
“Strained N-channel FinFETs with High-stress Nickel Silicide-Carbon Contacts and Integration with FUSI Metal Gate Technology”
T. Y. Liow1,2, R. T. P. Lee1, K. M. Tan1, M. Zhu1, K. M. Hoe2, G. S. Samudra1, N.Balasubramanian2 and Y. C. Yeo1
1National Univ. of Singapore, and 2Inst. of Microelectronics(Singapore)
Session No.B-7-5 September 21, Room102, 10:20 start !
“Two-Dimentional Electron Gas Switching in an Ultra Thin Epitaxial ZnO Layer on a Ferroelectric Gate Structure”
Y. Kaneko, H. Tanaka, Y. Kato and Y. Shimada
Matsushita Electric Industrial Co., Ltd.(Japan)
Session No.J-8-2 September 21, Room406, 11:05 start !
“A 0.49-6.50GHz Wideband LC-VCO with High-IRR in a 180nm CMOS Technology”
Y. Kobayashi, K. Ohashi, Y. Ito, H. Ito, K. Okada, K. Masu
Tokyo Tech.(Japan)
Session No.D-3-1 September 20, Room201B, 9:00 start !
“A 7.6-ps Pulse Generator Using 0.13-um InP-based HEMTs for Ultra Wide-Band Impulse Radio Systems”
Y. Nakasha1, Y. Kawano1, T. Suzuki1, T. Ohki2, T. Takahashi1, K. Makiyama1, T. Hirose2 and N. Hara1,
1Fujitsu Ltd. and 2Fujitsu Labs. Ltd.(Japan)
Session No.G-5-1 September 20, Room303, 15:15 start !
“First Demonstration of Electrically Driven 1.55um Single-Photon Generator”
T. Miyazawa1, S. Hirose2, S. Okumura2, K. Takemoto2, M. Takatsu2, T. Usuki1, N. Yokoyama2 and Y. Arakawa1,
1Univ. of Tokyo and2Fujitsu Labs. Ltd.(Japan)
Session No.E-1-3 September 19, Room202A, 15:00 start !
“Demonstration of Holes in Strained Ge Quantum Wells with Much Higher Drift Mobility and Density Than That of Electrons in Strained Si Channels”
M. Myronov1, K. Sawano1, K. M. Itoh2 and Y. Shiraki1,
1Musashi Inst. of Tech. and 2Keio Univ.(Japan)
Session No.F-3-2 September 20, Room202B, 9:15 start !
“Decoherence of nuclear spins in a GaAs quantum well probed by a submicron scale all-electrical NMR device”
T. Ota1,2, N. Kumada1, G. Yusa1,3,4, S. Miyashita5, T. Fujisawa1 and Y. Hirayama2,
1NTT Corp., 1,2,4SORST-JST, 3PRESTO-JST,4Tohoku Univ. and 5NTT-AT.(Japan)
Session No.I-9-2 September 21, Room405, 14:45 start !
“Highly Reliable Bottom-Contact Pentacene TFTs?with a Poly(chloroxylylene) Layer Selectively Grown on a Gate-Insulator”
R. Yasuda1, N. Hirai1, I. Yagi1, K. Nomoto1, J. Kasahara1, T. Minari2, K. Tsukagoshi2 and Y. Aoyagi2,4Tohoku Univ. and
1Sony Corp. and 2RIKEN.(Japan)
Session No.H-9-2 September 21, Room304, 13:45 start !
“Floating Gate MOS Capacitor with High Density Nanodots Array Produced by Protein Suparmolecule”
K. Yamada2, S. Yoshii1, S. Kumagai1, A. Miura2, Y. Uraoka2, T. Fuyuki2 and I. Yamashita1,2,3,
1Matsushita Electric Industrial Co., Ltd., 2NAIST and 3CREST-JST(Japan)
Session No.D-8-2 September 21, Room201B, 11:15 start !
“CMOS Compatible Si-Nanowire Inverter Logic Gate for Low Power Applications”
N. Singh, K.D.Buddharaju, S.C.Rustagi, Selin H.G.Teo, A.Agarwal, L.Y.Wong, L.J.Tang, C.H.Tung, J.Yu, G.Q.Lo, N. Balasubramanian and D.L.Kwong,
Inst. of Microelectronics(Singapore)
Session No.H-5-3 September 20, Room304, 16:00 start !