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History of SSDM Young Researcher Award
| Year of Award | Year of presentation | Presentation number | Paper Title | Awarded Author | Affiliation (Country) |
| SSDM2015 47th |
2014 | J-2-2 | Improvement of S-factor method for evaluation of MOS interface state density | W.-L. Cai | Univ. of Tokyo, Japan |
| K-1-6 | Heat protection circuit with polymer PTC for flexible electronics | T. Yokota | Univ. of Tokyo, Japan | ||
| D-1-6 | Ultra-High Selective Gas Sensors: novel approaches and future developments | M.W.G Hoffmann | Braunshweig Univ. of Technology | ||
| M-1-4 | Excitation of Electric-Field-induced Spin Wave in the Strained Garnet Ferrite Thin Films Using Sub-Picosecond Pulsed Wave | M. Adachi | Univ. of Tokyo, Japan | ||
| E-4-4L | 3.3 kV/1500 A Power Modules for the World's First All-SiC Traction Inverter | K. Hamada | Mitsubishi Electric Corp., Japan | ||
| SSDM2014 46th |
2013 | D-3-2 | Channel Length Scaling Limits of III-V Channel MOSFETs Governed by Source-Drain Direct Tunneling | S. Koba | Kobe Univ., Japan |
| A-2-4 | Excellent Scalability Including Self-Heating Phenomena of Vertical-Channel Field-Effect-Diode (FED) Type Capacitorless One Transistor DRAM Cell | T. Imamoto | Tohoku Univ., Japan | ||
| K-1-3 | High Speed Waveguide Integrated Lateral P-I-N Ge on Si Photodiode with very Low Dark Current | L. Virot | Institut d'Electronique Fondamentale, CEA-Leti and STMicroelectronics, France | ||
| G-1-5 | An implantable CMOS device for functional brain imaging under freely moving experiments of rats | M. Haruta | Nara Inst. of Sci. and Tech., Japan | ||
| F-1-5 | Gate Control of Spatial Electron Spin Distribution in Persistent Spin Helix State | Y. Kunihashi | NTT BRL, Japan | ||
| C-3-3 | Transport Properties and Defects at the Intersection of CVD Graphene Domains | Y. Ogawa | Kyushu Univ., Japan | ||
| SSDM2013 45th |
2012 | D-6-4 | Nickel Stanogermanide Ohmic Contact on N-type Germanium-Tin (Ge1-xSnx) using Se and S Implant and Segregation | Y. Tong | National Univ. of Singapore, Singapore |
| G-2-3 | Integration of 1-bit CMOS Address Decoders and Single-Electron Transistors Operating at Room Temperature | R. Suzuki | Univ. of Tokyo, Japan | ||
| I-9-3 | Shape-memory polymer microvalves and its application to a field-programmable valve array | H. Takehara | Univ. of Tokyo, Japan | ||
| C-5-5L | Graphene ReRAM towards All Graphene LSIs: Experimental Demonstration of Two-terminal ReRAM Operation in Electrically Broken Mono- and Multi-layer Graphene | A. Shindome | Tokyo Tech and Keio Univ., Japan | ||
| SSDM2012 44th |
2011 | E-3-3 | On the Si Surface Flattening Effect and Gate Insulator Breakdown Characteristic of Radical Reaction Based Insulator Formation Technology | R. Kuroda | Tohoku Univ., Japan |
| C-3-1 | Improvement of thermal stability in High Density Ta2O5 3D capacitor by additional thin SiO2 layer | M. Detalle | IMEC, Belgium | ||
| D-8-4 | Enhanced Degradation by NBT stress in Si Nanowire Transistor | K. Ota | Toshiba Corp., Japan | ||
| H-4-4 | Brain interface device with permeable hydrogel membrane for in vivo analysis of neural cells | H. Takehara | Univ. of Tokyo, Japan | ||
| SSDM2011 43rd |
2010 | B-2-2 | Single-Crystalline (100) Ge Stripes with High Mobilities Formed on Insulating Substrates by Rapid-Melting-Growth with Artificial Single-Crystal Si Seeds | K. Toko | Kyushu Univ., Japan |
| E-3-5 | Dynamics of the Charge Centroid in MONOS Memory Cells during Avalanche Injection and FN Injection Based on Incremental-Step-Pulse-Programming | J. Fujiki | Toshiba Corp., Japan | ||
| I-5-3 | The Unique Phenomenon in the Amorphous In2O3-Ga2O3-ZnO TFTs Degradation under the Dynamic Stress | M. Fujii | NAIST, Japan | ||
| D-4-3 | Demonstration of a Silicon photonic Crystal Slab LED with Efficient Electroluminescence | S. Nakayama | Univ. of Tokyo, Japan | ||
| SSDM2010 42nd |
2009 | B-7-1 | High Electron Mobility Ge n-Channel MOSFETs with GeO2 grown by High Pressure Oxidation | C. H. Lee | Univ. of Tokyo, Japan |
| D-4-2 | Effect of Via-Profile on the Via Reliability in Scaled-down Low-k/Cu Interconnects | I. Kume | NEC Electronics Corp., Japan | ||
| G-7-2 | Physical model for reset state of Ta2O5/TiO2 stacked ReRAM | Y. Sakotsubo | NEC Corp., Japan | ||
| I-1-7 | Demonstration of Quality Factor over 10,000 in Three-Dimensional Photonic Crystal Nanocavity by Cavity Size Control | A. Tandaechanurat | Univ. of Tokyo, Japan | ||
| I-4-2 | Fabrication of InAs Nanowire Vertical Surrounding-Gate Field Effect Transistor on Si Substrates | T. Tanaka | Hokkaido Univ., Japan | ||
| SSDM2009 41st |
2008 | C-7-1 | Low-Loss Magnetic Films of Ni-Zn Ferrite by Low-Temperature PVD Method for RF-CMOS Application | K. Kaneko | NEC Electronics Corp., Japan |
| J-9-2 | Resistive Switching Ion-Plug Memory for 32-nm Technology Node and Beyond | K. Ono | Hitachi Ltd., Japan | ||
| I-9-4 | Direct Observation of Field-Induced Carrier Dynamics in Pentacene Thin-film Transistors by ESR Spectroscopy | H. Matsui | AIST and Univ. of Tokyo, Japan | ||
| E-6-2 | Development of a CMOS image sensor for in situ brain functional imaging in freely-moving mouse | A. Tagawa | NAIST | ||
| C-3-3 | Huge Magnetoresistance Effect in Semiconductor based Nanostructures with Zinc-blende MnAs Nanoparticles | P. N. Hai | Univ. of Tokyo, Japan | ||
| SSDM2008 40th |
2007 | J-8-2 | Two-Dimensional Electron Gas Switching in an Ultra Thin Epitaxial ZnO Layer on a Ferroelectric Gate Structure | Y. Kaneko | Matsushita Electric Industrial Co., Ltd., Japan |
| D-3-1 | A 0.49-6.50 GHz Wideband LC-VCO with High-IRR in a 180 nm CMOS Technology | Y. Kobayashi | Tokyo Tech., Japan | ||
| H-8-1 | Hall effect measurements of polycrystalline pentacene TFTs with double gate structures | Y. Takamatsu | Univ. of Tokyo, Japan | ||
| D-7-4 | Rapid and High Sensitive Detection of Bacteria Sensor using a Porous Ion Exchange Film | K. Miyano | Osaka Univ., Japan | ||
| J-9-5 | Single charge sensitivity of single-walled carbon nanotube single-hole transistor | T. Kamimura | Osaka Univ.and CREST-JST, Japan | ||
| SSDM2007 39th |
2006 | J-7-4 | The Highly Reliable Evaluation of Mobility in an Ultra Thin High-k Gate Stack with an Advanced Pulse Measurement Method | R. Iijima | Toshiba Corp., Japna |
| E-10-3 | High Critical Electric Field Exceeding 8 MV/cm Measured Using AlGaN p-i-n Vertical Conducting Diode on n-SiC Substrate | A. Nishikawa | NTT Basic Research Labs., NTT Corp., Japan | ||
| F-2-2 | A Highly Reliable MIM Technology with non-Crystallized HfOx Dielectrics Using Novel MOCVD Stacked TiN Bottom Electrodes | T. Ohtsuka | Panasonic Semiconductor Engineering Co., Ltd., Japan | ||
| D-7-4 | Analysis of hole trapping into pentacene FET by Optical Second Harmonic Generation and C-V measurements | E. Lim | Tokyo Tech, Japan | ||
| H-8-1 | Strained SiGe-On-Insulator N-MOSFET with Silicon Source/Drain for Drive Current Enhancement | G. H. Wang | National Univ. of Singapore, Singapore | ||
| SSDM2006 38th |
2005 | A-3-2 | Permittivity Enhancement of Hf(1-x) Six O2 Film with High Temperature Annealing | K. Tomida | Univ. of Tokyo, Japan |
| F-10-3 | A pixel circuit for AMOLED consisting of OTFTs and OLED | K. B. Choe | Dong-A Univ., Korea | ||
| G-2-8 | Fowler-Nordheim current oscillations in Si(111)/SiO2/twisted-Si(111) tunneling structures | D. Moraru | Shizuoka University, Japan | ||
| I-5-2 | Normally-off Operation of Non-polar AlGaN/GaN Heterojunction FETs Grown on R-plane Sapphire | M. Kuroda | Matsushita Electric Industrial Co., Ltd., Japan | ||
| SSDM2005 37th |
2004 | A-5-1 | Successful CMOS Operation of Dopant-Segregation Schottky Barrier Transistors (DS-SBTs) | A. Kinoshita | Toshiba Corp., Japan |
| B-10-3 | Planar Double Gate CMOS transistors with 40nm metal gate for multipurpose applications | M. Vinet | CEA/DRT-LETI, France | ||
| H-2-3 | Room-Temperature Demonstration of Low-Voltage Static Memory Based on Negative Differential Conductance in Silicon Single-Hole Transistors | M. Saitoh | Univ. of Tokyo, Japan | ||
| F-10-3 | Bending and recovery tests of organic field-effect transistors | T. Sekitani | Univ. of Tokyo, Japan | ||
| SSDM2004 36th |
2003 | A-2-4 | Comparison of the Interconnect Capacitances for Various SRAM Cell Layouts to Achieve High Speed, Low Power SRAM Cells | Y. Tsukamoto | Renesas Technology Corp., Japan |
| D-1-5 | Measurement of Extension Structures in Deep Sub-Micron MOSFETs by Scanning Capacitance Microscopy based on Frequency Modulation Control | Y. Naitou | NEC Corp., Japan | ||
| E-3-3 | Electronic Charged States of Single Si Quantum Dots with Ge Core as Detected by AFM/Kelvin Probe Technique | Y. Darma | Hiroshima Univ., Japan | ||
| F-7-2 | Coupled Waveguide Devices Based on Autocloned Photonic Crystals | M. Shirane | NEC Corp., Japan | ||
| G-4-2 | Micro Cu Bump Interconnection on 3D Chip Stacking Technology | K. Tanida | ASET, Japan |
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