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CORE AREAS |
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| [1] Advanced Silicon Circuits and Systems | |
| (Chair, T. Kuroda, Keio Univ.) | |
| Original papers bridging the gap between materials, devices, circuits, and systems, are solicited in the subject areas including, but not limited to, the following: (1) Advanced digital, analog, mixed-signal, and memory, (2) Wireless, wireline, and optical communications, (3) Imagers, displays, and MEMS, (4) Low power technologies and power aware systems, (5) High speed circuits and systems, (6) Technologies for systems on a chip, (7) New concept and technologies; based on nanoelectronics, quantum mechanics, 3D-electronics, ferroelectrics, photonics, and organic electronics; using neural network, fuzzy logic, and multi-valued logic; and for bio-medical and microfluidic applications. | |
| [2] Advanced Silicon Devices and Device Physics | |
| (Chair, T. Mogami, NEC) | |
| The scope of this subcommittee covers all aspects of advanced silicon devices and device technologies for circuit applications. Papers are solicited in the following areas: (1) Sub-100nm silicon CMOS devices and their integration technologies including logic, memory and merged logic/memory LSIs, (2) Post-CMOS silicon device structure including vertical device and strained-silicon channel device, (3) New concepts, theories and breakthroughs in silicon-related devices, passive device and other functional devices, (4) Physics and reliability for advanced processes/devices including simulation and modeling and (5) Manufacturing and yield issue. | |
| [3] Silicon Process / Materials Technologies | |
| (Chair, N. Kobayashi, Selete) | |
| The session consists of advanced process and materials technologies for Si ULSI applications. Strongly encouraged are the topics of material innovations to improve device performance, manufacturability, and cost-efficiency. Papers are solicited in, but not limited to, the following areas: (1) Novel materials technologies such as high-k and ultra-low-k process to break through the scaling limitations of Logic, Memory and New-concept devices (2) Key process technologies to integrate sub-90nm Si ULSIs such as gate oxide integrity, ultra-shallow junction and Cu/low-k processes (3) Critical reliability issues related with advanced FEOL and BEOL processes including packaging. | |
| [4] New Materials and Characterization | |
| (Chair, S. Takagi, Toshiba) | |
| Introduction and utilization of new materials are expected as a key concept for further evolution and functionarization of Si-based logic and memory LSIs. Also, novel characterization techniques are indispensable in realizing these advance devices. Papers are solicited in the following areas (but not limited to these subjects): (1) Characterization and processing of group-IV semiconductors, high-k and low-k dielectrics and other new materials, including diamond, silicides (germanides), nano-tubes, fullerence and any other materials applicable to Si-based LSIs, (2) Physics and chemistry of surface and interface phenomena (including oxidation and nitridation), (3) Reliability physics and failure analysis of gate oxides and interconnect systems, (4) New characterization method for devices and materials including in-situ monitoring and nanometer-scale characterization. Submission of papers at a germinal stage is also encouraged. | |
| [5] Compound Semiconductor Materials and Devices | |
| (Chair, N. Kobayashi, NTT) | |
| Compound semiconductors
are the key materials supporting the highly information oriented society.
III-V, II-VI and wide-gap GaN and ZnO, and magnetic semiconductors are included as the materials. Compound Semiconductor Materials and Devices covers the following areas (but not limited): (1) Growth and characterization, (2) Heterostructures and superlattices, (3) Optical devices (LEDs, LDs and detectors) and electron devices (HFETs and HBTs), their device processing and reliability. |
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| [6] Optoelectronic Devices and Photonic Crystal Devices | |
| (Chair, O. Wada, Kobe Univ.) | |
| Towards ubiquitous communication and computing, optoelectronic devices are expected to explore novel functions and enhance performance by utilizing novel device physics and developing advanced fabrication techniques. The scope of this subcommittee covers all aspects of emerging technologies in active, passive, and integrated optoelectronic and photonic devices, which includes (1) laser diodes, LEDs, photodetectors, SOAs, and OEICs, (2) photonic crystal materials and novel functional devices, (3) optical switches, modulators, and MEMS, (4) optical wavelength converters, nonlinear optical devices, and all-optical switches, (5) waveguide components, PLCs and integrated photonic circuts, (6) material and device processing and characterization techniques, (7) hybrid and monolithic integration, packaging and moduling, and (8) optical communication, interconnection and signal processing applications of optoelectronic and photonic devices. | |
| [7] Novel Devices, Physics, and Fabrication | |
| (Chair, K. Ishibashi, RIKEN) | |
| The aim of this subcommittee is to explore novel devices and physics, mainly in nanoscale, with inorganic and molecular materials. Papers are solicited in the following areas, but not limited to: (1) quantum phenomena in nanoscale, (2) quantum dots and single electron devices, (3) solid state quantum computing, (4) spintronics, (5) new nanoscale materials such as carbon nanotubes, (6) molecular electronics, (7) other novel devices such as small superconducting device and resonant tunneling device. (8) nanofabrication, nanomechanics and characterization techniques in nanoscale. | |
| [8] Quantum Nanostructure Devices and Physics | |
| (Chair, Y. Hirayama, NTT) | |
| The field covers recent
progress in physics, fabrication, characterization and device applications
of nanostructures. The main topics includes (1) growth and processing of quantum dots and nanostructures. (2) transport/optical properties and THz/Femto-second dynamics (3) nanometer-scale characterization such as SPM and SNOM (4) nano electronic/optical devices (5) novel nanostructures and nanomaterials such as photonic crystals, magnetic materials and organic semiconductors. (6) spin and carrier control in quantum nanostructures. |
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| [9] Silicon-on-Insulator Technologies | |
| (Chair, A. Ogura, NEC) | |
| SOI technology today is rushing onto the commercial market while still being considered as a basic structure for achieving the ultimate Si devices. Moreover, new structures based on SOI are also appearing such as partial SOI, SON (Si on nothing), SGOI (SiGe on insulator) and SSOI (strained-Si on insulator). This subcommittee covers the whole field of SOI and SOI-related new technologies in a wide range of interests from circuit design to material issues. The topics will include, but not be limited to: (1) SOI Circuit Technology and LSI Applications (High Speed, Low Power Consumption, RF, Analog/Linear, etc.), (2) New Structure Devices (Double, Triple, Quadruple Gate, FINFET, Vertical Channel, Quantum, Strained Channel, Multi-Layer Devices, etc.), (3) Process Issues for Device Manufacturing (Isolation, Silicidation, Metal Gate, Plasma Damage, etc.), (4) Physics and Modeling of SOI Device/Process and Circuits (floating-body effect, self-heating, etc.), (5) SOI Materials Characterization and Manufacturing, and (6) Reliability Issues (Hot Carrier Injection, GOI, Radiation Effects, ESD, etc.). | |
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